Cortical Maps of Resistive Anisotropic Networks (CORMORANT)

Funding Agency: CEC

Funding period: 1994-1997


Contact Person

Giacomo.M. BISIO
Department of Biophysical and Electronic Engineering
University of Genoa
Via Opera Pia, 11a
I-16145 Genova, ITALY
tel:  (+39) 10 353 2756
fax:  (+39) 10 353 2777
e-mail: bisio@dibe.unige.it


	     DIBE-University of Genoa			I
             IRST (Trento)				I
	     Ruhr Universitat Bochum			D
	     University of Bonn				D


The project will investigate how the information processing capabilities of neural networks can be exploited in the direct (VLSI) implementation of complex algorithmic tasks such as those occurring in natural and artificial visual systems. Research will address: (i) the computational modeling of natural systems as formal neural networks; (ii) the formalization of neural computation through an abstract hierarchy of operators both for low- and high-level capabilities; (iii) the architectural specification of networks of these operators, specified as multilayer meshes of simple processing elements (lattice networks); (iv) the methodological issues related to the programmability/design of these meshes specified at the circuit level.


Analog approaches to the hardware implementation of machine vision systems can be very effective as far as real-time performance, size, and power consumption are concerned, but machine functionality, with regard both to the variety of tasks to be performed, and to the conditions of application, can be hindered by the limited flexibility and lack of programmability of analog circuits. A solution to this problem can be searched through a systematic approach to the sensorial/perceptual computations, that goes from proper model/algorithmic formulations, through adequate architectures based on flexible primitives, to efficient VLSI circuital solutions.

The target machine vision problem considered for proving these statements is the estimation of depth maps on the basis of phase-based disparity measurements. The proposed solutions are validated focussing on chip functionality, tested at layout level and through fabrication, and on the basis of specific computer simulations in artificial and real environments.

Architectural and circuital solutions for microsystems to be used in the emulation of early vision tasks

The single-chip microsystem is characterised by three levels of adaptability: Analog VLSI Gabor convolution kenels have been prototyped (see www.prosoma.lu).

Validation of the lattice approach under VLSI constraints